| PART |
Description |
Maker |
| NC7WV0706 NC7WV07P6XNL |
TinyLogic ULP-A Dual Buffer (Open Drain Output) AUP/ULP/V SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6
|
Fairchild Semiconductor, Corp.
|
| 74AUP2G32DC125 74AUP2G32GT 74AUP2G32GM 74AUP2G32GT |
Low-power dual 2-input OR gate; Package: SOT765-1 (VSSOP8); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL 2-INPUT OR GATE, PDSO8
Low-power dual 2-input OR gate; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" AUP/ULP/V SERIES, DUAL 2-INPUT OR GATE, PDSO8
|
NXP Semiconductors N.V.
|
| 74AUP2G08DC125 74AUP2G08GD125 |
Low-power dual 2-input AND gate; Package: SOT765-1 (VSSOP8); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL 2-INPUT AND GATE, PDSO8
Low-power dual 2-input AND gate; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL 2-INPUT AND GATE, PDSO8
|
NXP Semiconductors N.V.
|
| 74AUP1G38GM132 74AUP1G38GW125 |
Low-power 2-input NAND gate (open drain); Package: SOT886 (XSON6); Container: Tape reel smd AUP/ULP/V SERIES, 2-INPUT NAND GATE, PDSO6
Low-power 2-input NAND gate (open drain); Package: SOT353-1 (TSSOP5); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, 2-INPUT NAND GATE, PDSO5
|
NXP Semiconductors N.V.
|
| 74AUP1G14GS |
Low-power Schmitt trigger inverter AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO6
|
NXP Semiconductors N.V.
|
| 74AUP1G18GW125 74AUP1G18GF132 74AUP1G18GM132 |
Low-power 1-of-2 demultiplexer with 3-state deselected output; Package: SOT363 (SC-88); Container: Tape reel smd, Reverse AUP/ULP/V SERIES, 1 LINE TO 2 LINE MULTIPLEXER, TRUE OUTPUT, PDSO6
Low-power 1-of-2 demultiplexer with 3-state deselected output; Package: SOT891 (XSON6); Container: Tape reel smd AUP/ULP/V SERIES, 1 LINE TO 2 LINE MULTIPLEXER, TRUE OUTPUT, PDSO6
Low-power 1-of-2 demultiplexer with 3-state deselected output; Package: SOT886 (XSON6); Container: Tape reel smd AUP/ULP/V SERIES, 1 LINE TO 2 LINE MULTIPLEXER, TRUE OUTPUT, PDSO6
|
NXP Semiconductors N.V.
|
| 74AUP2G80GT 74AUP2G80GM 74AUP2G80DC 74AUP2G80 74AU |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| 74AUP1G86GS 74AUP1G86GF |
Low-power 2-input EXCLUSIVE-OR gate AUP/ULP/V SERIES, 2-INPUT XOR GATE, PDSO6
Low-power 2-input EXCLUSIVE-OR gate 低功输入异或
|
NXP Semiconductors N.V.
|
| NC7WP16P6X NC7WP16 NC7WP16L6X |
TinyLogic ULP Dual Buffer (Preliminary)
TINYLOGIC-R ULP DUAL BUFFER (PRELIMINARY)
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7WP07 NC7WP07L6X NC7WP07P6X FAIRCHILDSEMICONDUCT |
TinyLogic-R ULP Dual Buffer (Open Drain Output) (Preliminary)
TinyLogic ULP Dual Buffer (Open Drain Output) (Preliminary)
|
Fairchild Semiconductor
|
